The present invention relates, in general, to integrated circuits and, more particularly, to adaptive and reconfigurable integrated circuitry for multimode rake reception for dynamic search and multipath reception, utilized, for example, in CDMA, cdma2000, W-CDMA, or any other direct-sequence spread spectrum communication systems.
Code Division Multiple Access (xe2x80x9cCDMAxe2x80x9d), cdma2000, and wideband-CDMA (xe2x80x9cW-CDMADxe2x80x9d) mobile communication systems are increasingly deployed (or planned to be deployed) to accommodate increasing usage levels of mobile communication technologies. Within these communication systems, and more particularly within base stations and mobile stations (or mobile units, such as CDMA mobile telephones or multimedia devices), a xe2x80x9crakexe2x80x9d receiver is employed for multipath reception, to add both spatial diversity and time diversity to the communication system.
A rake receiver includes a plurality of xe2x80x9crake fingersxe2x80x9d, which are used for this multipath reception, and a designated searcher (with various searching windows). Such a searcher is employed to determine the available multipaths, to which the rake fingers are then assigned. In addition, within mobile stations, the searcher is also employed for system (pilot signal) acquisition, potential soft hand-off functions, and in general, to monitor a plurality of pilot signals or channels transmitted from a corresponding plurality of base stations, for ongoing, continuous selection of a currently strongest transmitted signal from a base station.
Current CDMA implementations of rake receivers employ a fixed number of rake fingers in mobile stations and in base stations. In mobile stations, typically three rake fingers are used to receive up to three multipaths, and one searcher is used to monitor the available or upcoming multipaths and base station signals, for example. Such a fixed number of fingers or searcher, each dedicated for either multipath reception or searching, respectively, may result in unacceptable delays (such as delays in system acquisition), dropped calls, degraded calls, or other poor system performance.
In addition, implementations of proposed technologies such as cdma2000 and W-CDMA may require or may be optimized with use of additional rake fingers in traffic mode for multipath reception and additional searchers for searching signal or channel selection, each with additional complexity to accommodate larger spreading (pseudorandom noise or xe2x80x9cPNxe2x80x9d) codes or sequences and orthogonal functions. Such use of additional, fixed and dedicated integrated circuit (xe2x80x9cICxe2x80x9d) hardware, however, may increase the complexity and cost of the rake receiver, and may increase power consumption, with potential detrimental effects on battery life and corresponding talk or traffic time.
As a consequence, a need remains to provide an adaptive and reconfigurable rake receiver, which may be dynamically optimized in real time for multimode functionality, for both multipath reception and searching functions. Such an adaptive and reconfigurable rake receiver should also minimize power consumption and should be suitable for low power applications, such as for use in hand-held and other battery-powered devices.
The present invention concerns a new type of rake receiver, namely, a multimode rake receiver, which may be included within either a mobile station or a base station, and which has dynamic pilot signal searching and multipath reception and combining capability, for CDMA, PCS, 3G or other mobile communication systems. The multimode rake receiver of the present invention may be implemented utilizing existing forms of integrated circuitry, or preferably implemented utilizing a new category of integrated circuitry and a new methodology for adaptive or reconfigurable computing.
In addition, the preferred multimode rake receiver of the present invention provides multiple modes of operation, a system acquisition mode, a traffic mode, and an idle mode. The present invention recognizes that in certain modes of operation, system acquisition more and idle mode, there is typically no need for more than one rake finger (zero in system acquisition, and one in idle mode), and any additional rake fingers in these modes would be a waste of IC material. Instead, in accordance with the invention, multiple searchers would be useful in these modes to increase system acquisition speed or neighbor searches. Also, in traffic mode, the exact number of multipaths or base station signals to receive is dynamically variable due to fading channels. Hence, the present invention provides the capability to dynamically swap rake fingers with searchers in order to enhance the performance of the receiver, depending on the current state of the radio frequency (RF) environment.
The preferred IC embodiment includes a plurality of heterogeneous computational elements coupled to an interconnection network, forming multimode rake fingers. The plurality of heterogeneous computational elements include corresponding computational elements having fixed and differing architectures, such as fixed architectures for different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability. In response to configuration information, the interconnection network is operative in real-time to configure and reconfigure the plurality of heterogeneous computational elements for a plurality of different functional modes, including pilot signal searching and multipath reception and combination.
More particularly, the preferred apparatus includes a network interface, a plurality of adaptive multimode rake fingers, and a multimode processor. Each adaptive multimode rake finger of the plurality of adaptive multimode rake fingers is responsive to first configuration information (a first or path mode signal) to configure for a path reception functional mode and is further responsive to second configuration information (a second or search mode signal) to configure for a searcher functional mode. The multimode processor is also responsive to the first configuration information (the first or path mode signal) to configure for the path reception functional mode and is further responsive to the second configuration information (the second or search mode signal) to configure for the searcher functional mode.
In accordance with the present invention, when the multimode rake receiver is in a system acquisition mode, all adaptive multimode rake fingers and the multimode processor are configured for the searcher functional mode. In a traffic mode, subsets of the adaptive multimode rake fingers and the multimode processor are configured for the searcher functional mode or for the path reception mode, dynamically, depending upon factors such as pilot signal strength and the number of available multipaths. In an idle mode, subsets of the adaptive multimode rake fingers and the multimode processor may also be configured for a power savings mode.
The present invention preferably utilizes a new form or type of integrated circuitry which effectively and efficiently combines and maximizes the various advantages of processors, application specific integrated circuits (xe2x80x9cASICsxe2x80x9d), and field programmable gate arrays (xe2x80x9cFPGAsxe2x80x9d), while minimizing potential disadvantages. In accordance with the present invention, such a new form or type of integrated circuit, referred to as an adaptive computing engine (ACE), is disclosed which provides the programming flexibility of a processor, the post-fabrication flexibility of FPGAs, and the high speed and high utilization factors of an ASIC. The ACE integrated circuitry of the present invention is readily reconfigurable, in real-time, is capable of having corresponding, multiple modes of operation, and further minimizes power consumption while increasing performance, with particular suitability for low power applications, such as for use in hand-held and other battery-powered devices.
The ACE architecture of the present invention, for adaptive or reconfigurable computing, includes a plurality of heterogeneous computational elements coupled to an interconnection network, rather than the homogeneous units of FPGAs. The plurality of heterogeneous computational elements include corresponding computational elements having fixed and differing architectures, such as fixed architectures for different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability. In response to configuration information, the interconnection network is operative in real-time to configure and reconfigure the plurality of heterogeneous computational elements for a plurality of different functional modes, including linear algorithmic operations, non-linear algorithmic operations, finite state machine operations, memory operations, and bit-level manipulations.
As illustrated and discussed in greater detail below, the ACE architecture provides a single IC, which may be configured and reconfigured in real-time, using these fixed and application specific computation elements, to perform a wide variety of tasks. In the preferred embodiment, the ACE architecture forms a plurality of adaptive rake fingers, utilizing elements such as correlators, phase estimators, and phase correctors, which may be dynamically configured and reconfigured for multipath reception and for searching (of both base station signals and available multipaths thereof).
Numerous other advantages and features of the present invention will become readily apparent from the following detailed description of the invention and the embodiments thereof, from the claims and from the accompanying drawings.